FPGA Developer
Salary: CHF 90'000 - 120'000 per year
Requirements:
- Initial experience in FPGA design and firmware development, preferably using VHDL.
- Familiarity with FPGA development environments and verification/debugging tools.
- Basic programming experience in Python or a similar language for test automation and data analysis.
- Experience with PCB design and electronic circuit development is desired.
- FPGA programming.
- Knowledge of VHDL.
- Knowledge of C/C++.
- Knowledge of Python.
- Spoken and written English, with a commitment to learn French.
- We require that you are a national of a CERN Member or Associate Member State.
- By the application deadline, you have a maximum of two years of professional experience since graduation in Computer Science, Electrical Engineering or a related field, and your highest educational qualification is either a Bachelors or Masters degree.
- You must have never had a CERN fellow or graduate contract before.
- Applicants without a university degree are not eligible.
- Applicants with a PhD are not eligible.
Responsibilities:
- Develop FPGA firmware for an interlock and protection system as part of a new solid-state RF amplifier design.
- Support the integration, commissioning, and validation of the new interlock system within our PS RF infrastructure.
- Develop Python-based tools for automated hardware testing, measurements, and data analysis.
- Develop FPGA firmware for rapid fault-detection and protection systems for RF systems across the PS Complex.
- Support the integration and testing of new systems.
- Contribute to laboratory testing and commissioning activities on RF equipment.
Technologies:
- FPGA
- Firmware
- Hardware
- Support
- Python
- VHDL
- LIS
More:
We are part of the Accelerators Systems Department (SY) and work within the Radio Frequency (RF) Group, responsible for the operation, maintenance, and development of RF power amplifiers and accelerating cavities. As part of the ongoing consolidation of the RF systems of the CERN Proton Synchrotron (PS), we are replacing existing vacuum tube-based driver amplifiers with new solid-state RF amplifiers. This is a fully onsite role with a 24-month contract, with a possible extension up to 36 months maximum, a 40-hour work week, and a target start date of 01-August-2026. The position involves work in radiation areas, interventions in underground installations, and stand-by duty when required. We offer a monthly stipend depending on your degree, 30 days of paid leave per year plus 2 weeks annual closure, comprehensive health insurance, membership of the CERN Pension Fund, family and child allowances depending on circumstances, a relocation package depending on circumstances, and on-the-job and formal training including language classes.
last updated 27 week of 2026
Original source: https://swissdevjobs.ch/jobs/CERN-FPGA-Developer